A developer has created a 160-core RISC V supercluster on a single M.2 board using low-speed CH32V003 cores, demonstrating its potential with a raymarcher demo, despite communication bottlenecks over PCIe.
Efficient Computer Corp emerges from stealth mode with their "Fabric" chip design, claiming to be 100 times more efficient than current processors. The innovative design focuses on optimizing parallelism and spatial computing, with a software stack supporting major embedded languages. While the need for software recompilation may limit mainstream adoption, the startup has secured $16 million in funding and aims to target specialized sectors for initial deployment, with production silicon shipping in early 2025.
The PicoCray project connects multiple Raspberry Pi Pico microcontroller modules into a parallel architecture leveraging an I2C bus to communicate between nodes. Each processor node implements a random back-off technique to request an address from the controller on the shared bus. Once a processor node has an address, it can be sent tasks from the controller node, such as computing elements of the Mandelbrot Set. The controller node collects the results from each processor node and aggregates the results for display.