Samsung's Advanced Interconnection Technology Boosts Exynos 2400's Performance and Thermals
Samsung is reportedly using FOWLP (Fan-Out Wafer Level Packaging) chip packaging technology to improve the performance and power efficiency of its chips. FOWLP reduces the size and thickness of chips, resulting in 15% higher performance, 40% smaller size, and 30% reduced thickness compared to current packaging technology. Samsung is expected to use FOWLP for the Exynos 2400, aiming to address the power efficiency and size issues that have plagued previous Exynos chips. If successful, this could help regain trust in the Exynos lineup and challenge TSMC in the contract chip fabrication segment.